Address Sequencing In Computer Organisation

Published: December 6, 2024 | Reading Time: 6 minutes

Overview

Address sequencing in computer organisation is an essential function that helps to manage how a computer accesses and processes data. It deals with the way memory locations are organised, how they are accessed, and how they can be manipulated when a program is executed. Address sequencing optimises how the processer sequences are addressed so they can reach the required data points for conditional branching, mapping instructions, and managing subroutines. Understanding this is important so that the system performance can be optimised for data retrieval times.

Table of Contents

What is Address Sequencing in Computer Organisation?

In computer organisation, address sequencing refers to the method that is used to generate a sequence of memory addresses that the processor follows during the execution of the command. This process is vital because efficient address sequencing is necessary for fast data retrieval. Hence, it is essential for optimal computer performance.

Control Memory and Microinstructions

Control memory holds groups of microinstructions where each defines a specific routine. These microinstructions guide the processor in executing tasks by generating the necessary micro-operations. Think of it as a set of detailed instructions that dictate how the computer should carry out operations.

If the hardware were to manage address sequencing, it would be responsible for navigating between routines and handling the sequencing of microinstructions within each routine.

Instruction Code Transformation Process

To execute a single instruction, the control unit follows these steps:

  1. Initial Address Loading: When the computer powers on, the Control Address Register (CAR) is loaded with an initial address. This address marks the start of the first microinstruction. Using this address, the system triggers the instruction fetch routine.

  2. Effective Address Calculation: The control memory runs the routine to calculate the effective address of the operand.

  3. Micro-operation Creation: A micro-operation is created to execute the instruction that was fetched from memory. This completes the cycle and enables the operation to take place.

Address Transformation and Mapping

The bits of information can be transformed into an address using the control memory where the routines are stored. This process is known as mapping. Address sequencing plays a key role in the process, and here's how it works:

Control Memory Architecture

Microinstructions in control memory consist of bits that serve different purposes. Some bits initiate micro-operations in computer registers and other bits determine how the next address is obtained.

Four Paths for CAR Address Retrieval

The Control Address Register (CAR) retrieves its address through four possible paths:

  1. Incrementer: Updates the CAR and selects the next instruction
  2. Branching Addresses: Defined within specific microinstruction fields, which allows the system to execute branching efficiently
  3. Conditional Branching: Enabled by applying conditions to the status bits of a microinstruction
  4. External Addresses: A mapping logic circuit facilitates sharing

A dedicated register stores the return address, which is essential when the microprogram needs to exit a subroutine. At that point, the system retrieves the saved address from this special register to resume execution.

Conditional Branching

Branch Logic and Decision-Making

The branch logic in the control unit handles decision-making. It uses special status bits that reflect parameters like mode settings, the sign bit, carry-out values, and input or output statuses. These bits provide critical information for controlling how the system behaves.

How Conditional Branching Works

When combined with the microinstruction field, these status bits help determine the outcome of a conditional branch. The microinstruction field specifies the branch address, and the branch logic hardware, which is implemented using a multiplexer, decides the next step:

Unconditional vs Conditional Branching

Unconditional Branch:

Conditional Branch:

Common Conditions Tested

Common conditions tested in conditional branching include:

Mapping of Instructions

Unique Branch Type in Control Memory

In control memory, when a microinstruction specifies a branch to the first word of a routine then a unique type of branch occurs. Each instruction in the system is linked to its corresponding micro-program routine. For this type of branch, the status bits come from the operation code which is part of the instruction.

Simple Mapping Process Example

A simple mapping process converts a 4-bit operation code into a 7-bit control memory address:

  1. The most significant bit (MSB) of the address is set to 0
  2. Followed by the 4 bits of the operation code
  3. The two least significant bits (LSBs) of the Control Address Register (CAR) are cleared during the process

Memory Allocation for Instructions

This approach ensures that each computer instruction has an assigned micro-program that is capable of holding up to four microinstructions:

This system provides flexibility in memory usage while also effectively controlling memory mapping.

Flexible Mapping with PLD or ROM

This concept can be expanded into a more flexible mapping approach using a Programmable Logic Device (PLD) or Read-Only Memory (ROM). The microinstruction address is derived from the operation code (OP-code) of an instruction. This microinstruction serves as the starting point in the execution sequence that initiates the corresponding routine for the program. Using PLDs or ROMs for mapping ensures a more adaptable method to link operation codes to their respective microinstructions in the control memory.

Subroutine

What are Subroutines?

Subroutines are like mini-programs designed to perform specific tasks that other routines can call upon. Using subroutines helps conserve microinstructions by reusing common sections of microcode, such as those for effective address computation.

How Subroutines Work

When the main routine calls a subroutine:

  1. The return address is stored in a dedicated subroutine register
  2. This enables the program to resume where it left off after the subroutine finishes
  3. Return addresses are typically stored in a register file, which is often structured as a 'Last In, First Out' (LIFO) stack

Benefits of Subroutines

Conclusion

Understanding address sequencing is essential for anyone learning computer architecture, whether you're a student or a professional. It lays the groundwork for optimising data flow, executing instructions, and working on system operations. Mastering this concept strengthens your grasp of how computers work and equips you to design and troubleshoot advanced systems in the future. Whether you're coding, debugging, or developing hardware, a solid understanding of address sequencing will be an asset in your tech toolkit.

To learn more, enroll in CCBP 4.0 Academy and prepare for the competitive job market of the future.

Frequently Asked Questions

What is address sequencing in computer organisation?

Address sequencing is the process of generating a sequence of memory addresses to control the execution of instructions in a computer. It enables efficient data retrieval and execution flow by managing how the processor accesses control memory.

Why is address sequencing important?

Address sequencing is crucial for optimising system performance. It allows for efficient branching, subroutine management, and instruction execution, all of which are vital for smooth operations in computer systems.

How does address sequencing handle branching?

Address sequencing uses status bits and microinstruction fields to determine whether to take a conditional or unconditional branch. The system decides the next address based on these conditions or increments the address register for sequential execution.

What role do subroutines play in address sequencing?

Subroutines help reuse common microcode sections and reduce redundancy. They store return addresses in registers which are organized in a LIFO stack. It ensures the program resumes correctly after the subroutine finishes.

How does the mapping process work in address sequencing?

Mapping transforms operation code (OP-code) bits into control memory addresses. This process uses logic circuits like PLDs or ROMs to ensure the correct microinstructions are executed based on the instruction's OP code.

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Source: NxtWave CCBP Blog

Original URL: https://www.ccbp.in/blog/articles/address-sequencing-in-computer-organisation

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